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From variability tolerance to approximate computing in parallel integrated architectures and accelerators [electronic resource]

From variability tolerance to approximate computing in parallel integrated architectures and accelerators [electronic resource]

자료유형
E-Book(소장)
개인저자
Raḥīmī, ʿAbbās. Benini, Luca, 1967-. Gupta, Rajesh Kumar, 1961-.
서명 / 저자사항
From variability tolerance to approximate computing in parallel integrated architectures and accelerators [electronic resource] / Abbas Rahimi, Luca Benini, Rajesh K. Gupta.
발행사항
Cham :   Springer,   2017.  
형태사항
1 online resource (xv, 197 p.) : ill. (some col.).
ISBN
9783319537689 (e-Book) 9783319537672
요약
This book focuses on computing devices and their design at various levels to combat variability. The authors provide a review of key concepts with particular emphasis on timing errors caused by various variability sources. They discuss methods to predict and prevent, detect and correct, and finally conditions under which such errors can be accepted; they also consider their implications on cost, performance and quality. Coverage includes a comparative evaluation of methods for deployment across various layers of the system from circuits, architecture, to application software. These can be combined in various ways to achieve specific goals related to observability and controllability of the variability effects, providing means to achieve cross layer or hybrid resilience. · Covers challenges and opportunities in identifying microelectronic variability and the resulting errors at various layers in the system abstraction; · Enables readers to assess how various levels of circuit and system design can mitigate the effects of variability; Demonstrates overall system architecture of what is now called “approximate computing” paradigm in massively parallel integrated architectures and accelerators.
일반주기
Title from e-Book title page.  
내용주기
Introduction -- Part 1. Predicting and Preventing Errors -- Instruction-Level Tolerance -- Sequence-Level Tolerance -- Procedure-Level Tolerance -- Kernel-Level Tolerance -- Hierarchically Focused Guardbanding -- Part 2. Detecting and Correcting Errors -- Work-Unit Tolerance -- Memristive-Based Associative Memory for Error Recovery -- Part 3. Accepting Errors -- Accuracy-Configurable OpenMP -- An Approximation Workflow for Exploiting Data-Level Parallelism in FPGA Acceleration -- Memristive-Based Associative Memory for Approximate Computational Reuse -- Spatial and Temporal Memoization -- Outlook.
서지주기
Includes bibliographical references and index.
이용가능한 다른형태자료
Issued also as a book.  
일반주제명
Engineering. Computer architecture. Parallel processing (Electronic computers).
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020 ▼a 9783319537689 (e-Book)
020 ▼a 9783319537672
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082 0 4 ▼a 004.2/2 ▼2 23
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100 1 ▼a Raḥīmī, ʿAbbās.
245 1 0 ▼a From variability tolerance to approximate computing in parallel integrated architectures and accelerators ▼h [electronic resource] / ▼c Abbas Rahimi, Luca Benini, Rajesh K. Gupta.
260 ▼a Cham : ▼b Springer, ▼c 2017.
300 ▼a 1 online resource (xv, 197 p.) : ▼b ill. (some col.).
500 ▼a Title from e-Book title page.
504 ▼a Includes bibliographical references and index.
505 0 ▼a Introduction -- Part 1. Predicting and Preventing Errors -- Instruction-Level Tolerance -- Sequence-Level Tolerance -- Procedure-Level Tolerance -- Kernel-Level Tolerance -- Hierarchically Focused Guardbanding -- Part 2. Detecting and Correcting Errors -- Work-Unit Tolerance -- Memristive-Based Associative Memory for Error Recovery -- Part 3. Accepting Errors -- Accuracy-Configurable OpenMP -- An Approximation Workflow for Exploiting Data-Level Parallelism in FPGA Acceleration -- Memristive-Based Associative Memory for Approximate Computational Reuse -- Spatial and Temporal Memoization -- Outlook.
520 ▼a This book focuses on computing devices and their design at various levels to combat variability. The authors provide a review of key concepts with particular emphasis on timing errors caused by various variability sources. They discuss methods to predict and prevent, detect and correct, and finally conditions under which such errors can be accepted; they also consider their implications on cost, performance and quality. Coverage includes a comparative evaluation of methods for deployment across various layers of the system from circuits, architecture, to application software. These can be combined in various ways to achieve specific goals related to observability and controllability of the variability effects, providing means to achieve cross layer or hybrid resilience. · Covers challenges and opportunities in identifying microelectronic variability and the resulting errors at various layers in the system abstraction; · Enables readers to assess how various levels of circuit and system design can mitigate the effects of variability; Demonstrates overall system architecture of what is now called “approximate computing” paradigm in massively parallel integrated architectures and accelerators.
530 ▼a Issued also as a book.
538 ▼a Mode of access: World Wide Web.
650 0 ▼a Engineering.
650 0 ▼a Computer architecture.
650 0 ▼a Parallel processing (Electronic computers).
700 1 ▼a Benini, Luca, ▼d 1967-.
700 1 ▼a Gupta, Rajesh Kumar, ▼d 1961-.
856 4 0 ▼u https://oca.korea.ac.kr/link.n2s?url=https://doi.org/10.1007/978-3-319-53768-9
945 ▼a KLPA
991 ▼a E-Book(소장)

소장정보

No. 소장처 청구기호 등록번호 도서상태 반납예정일 예약 서비스
No. 1 소장처 중앙도서관/e-Book 컬렉션/ 청구기호 CR 004.22 등록번호 E14015897 도서상태 대출불가(열람가능) 반납예정일 예약 서비스 M

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