As the services provided by unmanned vehicles such as UAV (Unmanned Aerial Vehicle), USV (Unmanned Surface Vehicle), and autonomous automobile, are diversified, the complexity of functions provided by unmanned vehicles is increasing. Due to various new functions, the unmanned vehicles are vulnerable to safety due to fault and hacking of hardware and software. In this dissertation, we propose a SW-SoC convergence platform to guarantee the system safety during the design/development of Safety-critical Systems used in unmanned vehicles. And we propose a monitoring framework to debug the system after prototype development of Safety-critical Systems.
This dissertation consists of three parts. The first part of this dissertation describes the previous research on virtual platform suitable for designing and developing Safety-critical Systems. And we analyze the ARINC 653 standard and the real-time operating system (RTOS) applied to Safety-critical Systems, and describes the existing methods for debugging to find the fault of Safety-critical Systems.
In the second part of this dissertation, we propose a SW-SoC convergence platform that extends the virtual platform, which is a way to design, develop and debug hardware and software simultaneously. The previous virtual platforms focused on supporting the development of IP and device driver. But the SW-SoC convergence platform proposed in this dissertation supports development, simulation and debugging of TLM IP, RTL IP, device driver, and application software in Safety-critical Systems. The SW-SoC convergence platform is a software-based debugging framework that can develop, optimize, and verify software and IP (Intellectual Property) without the actual hardware system. In a virtual platform implemented with software, hardware and software modifications can be reflected and tested faster than real platforms implemented in hardware. Since the virtual platform is abstracted, it is possible to simulate much faster than simulating the hardware platform. In addition, GPOS, RTOS, and firmware are mounted on a virtual platform to provide an integrated simulation environment, enabling both hardware and software developers to simultaneously develop and verify performance. This makes it possible to guarantee the flexibility of system development and shorten the development period. In this dissertation, we propose three virtual platforms based on a single core (ARM9), a multi-core (ARM big.LITTLE), and a low-power core (ARM Cortex-M4).
In the third part of this dissertation, we propose a software-based monitoring framework suitable for debugging in the HILS environment after developing the prototype of Safety-critical Systems. The proposed monitoring framework is applicable to RTOS based on TSP architecture that complies with ARINC 653 standard for aircraft systems. And it has memory read/write function, register read/write function, breakpoint function, snapshot function, trigger function, program step execution function, cycle function and redundancy monitor function. We have verified that the proposed monitoring framework is suitable for monitoring and debugging RTOS and application software based on TSP architecture by using these functions in RTOS performance measurement and application software monitoring in avionics system with RTOS.