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Advanced techniques for embedded systems design and test

Advanced techniques for embedded systems design and test

자료유형
단행본
개인저자
Lopez, Juan Carlos. Hermida, Roman. Geisselhardt, Walter.
서명 / 저자사항
Advanced techniques for embedded systems design and test / edited by Juan Carlos Lopez, Roman Hermida, Walter Geisselhardt.
발행사항
Boston :   Kluwer Academic ,   c1998.  
형태사항
xiii, 290 p. : ill. ; 25 cm.
ISBN
0792381289 (alk. paper) 9780792381280
서지주기
Includes bibliographical references and index.
일반주제명
Embedded computer systems -- Design and construction. Embedded computer systems -- Testing.
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001 000045408776
005 20071220152434
008 980113s1998 maua b 001 0 eng
010 ▼a 98011763
020 ▼a 0792381289 (alk. paper)
020 ▼a 9780792381280
035 ▼a (KERIS)REF000004634939
040 ▼a DLC ▼c DLC ▼d DLC ▼d 211009
050 0 0 ▼a TK7895.E42 ▼b A38 1998
082 0 0 ▼a 004.2/1 ▼2 22
090 ▼a 004.21 ▼b A244
245 0 0 ▼a Advanced techniques for embedded systems design and test / ▼c edited by Juan Carlos Lopez, Roman Hermida, Walter Geisselhardt.
246 3 0 ▼a Embedded systems design and test
260 ▼a Boston : ▼b Kluwer Academic , ▼c c1998.
300 ▼a xiii, 290 p. : ▼b ill. ; ▼c 25 cm.
504 ▼a Includes bibliographical references and index.
650 0 ▼a Embedded computer systems ▼x Design and construction.
650 0 ▼a Embedded computer systems ▼x Testing.
700 1 ▼a Lopez, Juan Carlos.
700 1 ▼a Hermida, Roman.
700 1 ▼a Geisselhardt, Walter.
945 ▼a KINS

소장정보

No. 소장처 청구기호 등록번호 도서상태 반납예정일 예약 서비스
No. 1 소장처 과학도서관/Sci-Info(2층서고)/ 청구기호 004.21 A244 등록번호 121161791 도서상태 대출가능 반납예정일 예약 서비스 B M

컨텐츠정보

저자소개

Juan Carlos Lopez(엮은이)

Roman Hermida(엮은이)

정보제공 : Aladin

목차

Preface; J.C. Lopez, et al. 1. Embedded System Specification; E. Villar, M. Veiga. 2. Supporting Early System-Level Design Space Exploration in the Deep Submicron Era; M.F. Jacome, J.C. Lopez. 3. Knowledge Based Hardware-Software Partitioning of Electronic Systems; M.L. Lopez-Vallejo, J.C. Lopez. 4. An Industrial Case Study in HW-SW Co-Design Using CASTLE; P.G. Ploger, et al. 5. Automatic Formal Derivation Applied to High-Level Synthesis; J.M. Mendias, R. Hermida. 6. Overlapped Scheduling Techniques for High-Level Synthesis and Multiprocessor Realizations of DSP Algorithms; S.H. Gerez, et al. 7. Synthesis of Reconfigurable Control Devices Based on Object-Oriented Specifications; V. Sklyarov, et al. 8. Estimation of Circuit Physical Features in High-Level Synthesis Based on Standard Cells; M. Fernandez, H. Mecha. 9. Test Synthesis of Digital Systems; P. Sanchez, V. Fernandez. 10. Advances in ATPG by Exploiting the Behavioral View; W. Geisselhardt, H.-D. Huemmer. 11. Behavioral Fault Simulation; J.-F. Santucci, et al. Index.


정보제공 : Aladin

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