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Floating gate devices : operation and compact modeling

Floating gate devices : operation and compact modeling (Loan 7 times)

Material type
단행본
Personal Author
Pavan, Paolo. Larcher, Luca. Marmiroli, Andrea.
Title Statement
Floating gate devices : operation and compact modeling / by Paolo Pavan, Luca Larcher, and Andrea Marmiroli.
Publication, Distribution, etc
Boston :   Kluwer Academic ,   2004.  
Physical Medium
xiii, 129 p. : ill. ; 25 cm.
ISBN
1402077319 9781402077319
Bibliography, Etc. Note
Includes bibliographical references and index.
Subject Added Entry-Topical Term
Flash memories (Computers) Gate array circuits.
000 00960pamuu22003014a 4500
001 000045362759
005 20070620161541
008 031223s2004 maua b 001 0 eng
010 ▼a 2003070343
020 ▼a 1402077319
020 ▼a 9781402077319
035 ▼a (KERIS)REF000009955637
040 ▼a DLC ▼c DLC ▼d DLC ▼d 211009
042 ▼a pcc
050 0 0 ▼a TK7895.M5 ▼b P38 2004
082 0 0 ▼a 004.5/3 ▼2 22
090 ▼a 004.53 ▼b P337f
100 1 ▼a Pavan, Paolo.
245 1 0 ▼a Floating gate devices : ▼b operation and compact modeling / ▼c by Paolo Pavan, Luca Larcher, and Andrea Marmiroli.
260 ▼a Boston : ▼b Kluwer Academic , ▼c 2004.
300 ▼a xiii, 129 p. : ▼b ill. ; ▼c 25 cm.
504 ▼a Includes bibliographical references and index.
650 0 ▼a Flash memories (Computers)
650 0 ▼a Gate array circuits.
700 1 ▼a Larcher, Luca.
700 1 ▼a Marmiroli, Andrea.
945 ▼a KINS

Holdings Information

No. Location Call Number Accession No. Availability Due Date Make a Reservation Service
No. 1 Location Science & Engineering Library/Sci-Info(Stacks2)/ Call Number 004.53 P337f Accession No. 121148035 Availability Available Due Date Make a Reservation Service B M

Contents information

Table of Contents

Contributing Authors. Preface. Foreword. 1: Introduction. 1. Compact modeling. 2. Semiconductor memories. 3. Floating gate devices. 4. First commercial devices and products. 5. Evolution. 6. Applications and market considerations. References. 2: Principles of floating gate devices. 1. Technology highlights. 2. Cell operation. 3. Disturbs and reliability. References. 3: DC conditions: read. 1. Traditional FG device models. 2. The charge balance model. 3. Simulation results. References. 4: Transient conditions: program and erase. 1. Models proposed in the literature. 2. The charge balance model: the extension transient conditions. 3. Fowler-Nordheim current. 4. Channel hot electron current. References. 5: Further possibilities of FG device compact models. 1. Reliability prediction. 2. Statistics. References. 6: Non volatile memory devices. 1. Basic elements. 2. Main building blocks of the device. 3. Matrix and decoders. 4. Operating modes. 5. DMA test. Acknowledgement. References. Acknowledgements.


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