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Stream processor architecture

Stream processor architecture

자료유형
단행본
개인저자
Rixner, Scott.
서명 / 저자사항
Stream processor architecture / by Scott Rixner.
발행사항
Boston :   Kluwer Academic Publishers,   c2002.  
형태사항
xiv, 120 p. : ill. ; 25 cm.
총서사항
The Kluwer international series in engineering and computer science ; SECS 644
ISBN
0792375459 (alk. paper) :
서지주기
Includes bibliographical references (p. [113]-117) and index.
일반주제명
Microprocessors. Computer architecture.
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020 ▼a 0792375459 (alk. paper) : ▼c EUR 107.00
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100 1 ▼a Rixner, Scott.
245 1 0 ▼a Stream processor architecture / ▼c by Scott Rixner.
260 ▼a Boston : ▼b Kluwer Academic Publishers, ▼c c2002.
300 ▼a xiv, 120 p. : ▼b ill. ; ▼c 25 cm.
440 4 ▼a The Kluwer international series in engineering and computer science ; ▼v SECS 644
504 ▼a Includes bibliographical references (p. [113]-117) and index.
650 0 ▼a Microprocessors.
650 0 ▼a Computer architecture.

소장정보

No. 소장처 청구기호 등록번호 도서상태 반납예정일 예약 서비스
No. 1 소장처 세종학술정보원/과학기술실/ 청구기호 004.22 R626s 등록번호 151124934 도서상태 대출가능 반납예정일 예약 서비스 C

컨텐츠정보

목차

Foreword. Acknowledgements. 1: Introduction. 1.1 Stream Architecture. 1.2. The Imagine Media Processor. 1.3. Contributions. 1.4. Overview. 2: Background. 2.1. Special-purpose Media Processors. 2.2. Programmable Media Processors. 2.3. Vector Processors. 2.4. Stream Processors. 2.5. Storage Hierarchy. 2.6. DRAM Access Scheduling. 2.7. Summary. 3: Media Processing Applications. 3.1. Media Processing. 3.2. Sample Applications. 3.3. Application Characteristics. 4: The Imagine Stream Processor. 4.1. Stream Processing. 4.2. Architecture. 4.3. Programming Model. 4.4. Implementation. 4.5. Scalability and Extensibility. 5: Data Bandwidth Hierarchy. 5.1. Overview. 5.2. Communication Bottlenecks. 5.3. Register Organization. 5.4. Evaluation. 5.5. Summary. 6: Memory Access Scheduling. 6.1. Overview. 6.2. Modern DRAM. 6.3. Memory Access Scheduling. 6.4. Evaluation. 6.5. Summary. 7: Conclusions. 7.1. Imagine Summary. 7.2. Future Architectures. References. Index.


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