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Computer architecture and logic design

Computer architecture and logic design (Loan 4 times)

Material type
단행본
Personal Author
Bartee, Thomas C.
Title Statement
Computer architecture and logic design / Thomas C. Bartee.
Publication, Distribution, etc
New York :   McGraw-Hill,   c1991.  
Physical Medium
xii, 628 p. : ill. ; 25 cm.
ISBN
0070039097 :
Bibliography, Etc. Note
Includes bibliographical references (p. 615) and index.
Subject Added Entry-Topical Term
Computer architecture. Logic design.
비통제주제어
Computers, Design,,
000 00803pamuuu200277 a 4500
001 000000481590
003 OCoLC
005 19970515105852.0
008 900628s1991 nyua b 001 0 eng
010 ▼a 90042808
015 ▼a GB91-69158
019 ▼a 26304117
020 ▼a 0070039097 : ▼c $45.95
040 ▼a DLC ▼c DLC ▼d UKM
049 ▼a ACSL ▼l 421116309
050 0 0 ▼a QA76.9.A73 ▼b B374 1991
082 0 0 ▼a 004.2/2 ▼2 20
090 ▼a 004.22 ▼b B283c
100 1 ▼a Bartee, Thomas C.
245 1 0 ▼a Computer architecture and logic design / ▼c Thomas C. Bartee.
260 ▼a New York : ▼b McGraw-Hill, ▼c c1991.
300 ▼a xii, 628 p. : ▼b ill. ; ▼c 25 cm.
504 ▼a Includes bibliographical references (p. 615) and index.
650 0 ▼a Computer architecture.
650 0 ▼a Logic design.
653 0 ▼a Computers ▼a Design

Holdings Information

No. Location Call Number Accession No. Availability Due Date Make a Reservation Service
No. 1 Location Science & Engineering Library/Sci-Info(Stacks2)/ Call Number 004.22 B283c Accession No. 421116309 Availability Available Due Date Make a Reservation Service B M

Contents information

Table of Contents


CONTENTS
Preface = xi
1 Computer Operation = 1
 1.1 Electronic Digital Computers = 1
 1.2 Some Different Types of Computer Systems = 3
 1.3 Computers in Control Systems = 5
 1.4 Basic Computers of a Digital Computer = 6
 1.5 Programming Overview = 8
 1.6 Instructions = 12
 1.7 Assembly Languages = 16
 1.8 High-Level Languages = 18
Questions = 19
2 Number Systems = 21
 2.1 Decimal System = 21
 2.2 Bistable Devices = 22
 2.3 Counting in the Binary System = 22
 2.4 Binary Addition and Subtraction = 24
 2.5 Binary Multiplication and Division = 24
 2.6 Converting Decimal Numbers to Binary = 26
 2.7 Negative Numbers = 27
 2.8 Use of Complements to Represent Negative Numbers = 28
 2.9 Binary-Coded-Decimal Number Representation = 33
 2.10 Octal and Hexadecimal Number Systems = 35
 2.11 Floating-Point Number Systems = 38
 2.12 Alphanumeric Codes = 45
Questions = 46
3 Boolean Algebra and Gate Networks = 55
 3.1 Fundamental Concepts of Boolean Algebra = 56
 3.2 AND Gates and OR Gates = 57
 3.3 Complementation and Inverters = 59
 3.4 Evaluation of Logical Expressions = 60
 3.5 Basic Laws of Boolean Algebra = 62
 3.6 De Morgan's Theorem = 65
 3.7 Derivation of a Boolean Expression = 66
 3.8 Interconnecting Gates = 69
 3.9 Sum of Products and Product of Sums = 70
 3.10 Derivation of a Three-Input-Variable Expression = 73
 3.11 NAND Gates and NOR Gates = 75
 3.12 Map Method for Simplifying Expressions* = 78
 3.13 Subcubes and Covering = 81
 3.14 Product-of-Sums Expressions―Don't-Cares = 86
 3.15 Design Using NAND Gates = 91
 3.16 Design Using NOR Gates = 95
 3.17 NAND-to-AND and NOR-to-OR Gate Networks = 100
 3.18 Wired OR and Wired AND Gates* = 103
 3.19 PLAs and PLAs* = 106
Questions = 117
4 Logic Design = 132
 4.1 Flip-Flops = 132
 4.2 Clocks = 136
 4.3 Flip-Flop Designs = 138
 4.4 Shift Register = 144
 4.5 Binary Counter = 145
 4.6 BCD Counters = 150
 4.7 Integrated Circuits = 152
 4.8 Medium-, Large-, and Very Large-Scale Intergration = 158
 4.9 Counter Design* = 163
 4.10 State Diagrams and State Tables = 166
 4.11 Design of a Sequential Magnitude Comparator = 171
 4.12 Comments―Mealy Machines = 174
 4.13 Programmable Arrays of Logic* = 176
 4.14 Computer-Aided Design of Computer Logic = 182
Questions = 183
5 The Arithmetic-Logic Unit = 190
 5.1 Construction of the ALU = 191
 5.2 Integer Representation = 191
 5.3 Binary Half-Adder = 193
 5.4 Full Adder = 194
 5.5 A Parallel Binary Adder = 195
 5.6 Addition and Subtraction in a Parallel Arithmetic Element = 197
 5.7 Full Adder Designs = 200
 5.8 Binary-Coded-Decimal Adder = 202
 5.9 Positive and Negative BCD Numbers = 206
 5.10 Shift Operation = 209
 5.11 Basic Operations = 211
 5.12 Logical Operations = 224
 5.13 Multiplexers = 227
 5.14 High-Speed Arithmetic* = 229
Questions = 236
6 The Memory Element = 244
 6.1 Random-Access Memories = 245
 6.2 Linear-Select Memory Organization = 248
 6.3 Decoders = 251
 6.4 Dimensions of Memory Access = 254
 6.5 Connecting Memory Chips to a Computer Bus = 259
 6.6 Static Random-Access Memories = 263
 6.7 Dynamic Random-Access Memories = 266
 6.8 Read-Only Memories = 271
 6.10 Flexible-Disk Storage Systems―The Floppy Disk = 280
 6.11 Magnetic Tape = 281
 6.12 Tape Cassettes and Cartridges = 286
 6.13 Magnetic bubble and CCD Memories = 287
 6.14 Optical Storage Devices = 288
 6.15 Computer Word Structures = 289
 6.16 Storage Hierarchies = 290
 6.17 Virtual Memory = 293
 6.18 Cache Memory = 304
 6.19 Digital Recording Techniques = 309
Questions = 315
7 Input / Output Devices = 322
 7.1 Terminals, Personal Computers, and Workstations = 322
 7.2 Input Media = 323
 7.3 Character Recognition = 329
 7.4 Output Equipment = 331
 7.5 Error-Detecting and Error-Correcting Codes = 342
 7.6 Buses for Personal Computers and Workstations = 343
 7.7 Serial Transmission of Character Codes = 344
 7.8 Input / Ouput Devices for Systems with Analog Computers = 346
Questions = 366
8 Buses and Interfaces = 372
 8.1 Interconnecting System Computers = 372
 8.2 Interrupts and Direct Memory Access = 373
 8.3 Large and Small Computer Peripheral Organization = 375
 8.4 Interfacing―Buses = 378
 8.5 I / O Addressing Techniques = 389
 8.6 Memory-Mapped I / O = 391
 8.7 Interrupts in Input / Ouput Systems = 395
 8.8 Standard Buses = 399
 8.9 Interfacing a Keyboard = 404
 8.10 Interfacing a Printer = 410
Questions = 412
9 The Control Unit = 417
 9.1 Construction of an Instruction Word = 417
 9.2 Instruction Cycle and Execution Cycle Organization of Control Registers = 421
 9.3 Controlling Arithmetic Operations = 424
 9.4 Typical Sequence of OPerations = 430
 9.5 Branch, Skip, or Jump Instructions = 433
 9.6 Shift Instructions = 435
 9.7 Register Transfer Language = 438
 9.8 Microprogramming = 441
Questions = 448
10 Computer Architecture = 452
 10.1 Instruction Word Formats : Number of Addresses = 453
 10.2 Representation of Instructions and Data = 456
 10.3 Addressing Techniques = 457
 10.4 Direct Addressing = 457
 10.5 Immediate Addressing = 461
 10.6 Relative Addressing = 463
 10.7 Indirect Addressing = 465
 10.8 Indexed Addressing = 466
 10.9 BRANCH and JUMP Instructions = 469
 10.10 Flags, Condition Codes, and Status Registers = 469
 10.11 Subroutine (Subprogram) Calls = 474
 10.12 Interrupts = 476
 10.13 Pipelined Computers = 476
 10.14 RISC and CISC Architectures = 479
 10.15 Security and Protection = 480
Questions = 483
11 Selected Architectures = 486
 11.1 Microprocessor Chip Development = 487
 11.2 Intel Series Development = 487
 11.3 6800 Microprocessor Series = 496
 11.4 PDP-11 Series = 507
 11.5 68000 Microprocessor Series = 517
 11.6 The 80386 / 80486 Microprocessor = 534
 11.7 80386 Data Types = 538
Questions = 546
12 Digital Circuits = 551
 12.1 Circuit Principles = 551
 12.2 Diode Gates = 557


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