VLSI algorithms and architectures : 3rd Aegean Workshop on Computing, AWOC 88, Corfu, Greece, June 28-July 1, 1988 : proceedings
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| 001 | 000000109753 | |
| 005 | 19980527092624.0 | |
| 008 | 880902s1988 gw a b 100 0 eng | |
| 010 | ▼a 88181270 | |
| 020 | ▼a 0387968180 | |
| 040 | ▼a DLC ▼c DLC | |
| 049 | 1 | ▼l 421048754 ▼f 과학 |
| 050 | 0 | ▼a TK7874 ▼b .A338 1988 |
| 082 | 0 0 | ▼a 621.395 ▼2 19 |
| 090 | ▼a 004.22 ▼b A247v | |
| 111 | 2 | ▼a Aegean Workshop on Computing ▼n (3rd : ▼d 1988 : ▼c Kerkyra, Corfu Island, Greece) |
| 245 | 1 0 | ▼a VLSI algorithms and architectures : ▼b 3rd Aegean Workshop on Computing, AWOC 88, Corfu, Greece, June 28-July 1, 1988 : proceedings / ▼c J.H. Reif (ed.). |
| 260 | ▼a Berlin ; ▼a New York : ▼b Springer-Verlag, ▼c c1988. | |
| 300 | ▼a x, 476 p. : ▼b ill. ; ▼c 25 cm. | |
| 440 | 0 | ▼a Lecture notes in computer science ; ▼v 319. |
| 504 | ▼a Includes bibliographies. | |
| 650 | 0 | ▼a Integrated circuits ▼x Very large scale integration ▼x Congresses. |
| 650 | 0 | ▼a Computer architecture ▼x Congresses. |
| 650 | 0 | ▼a Algorithms ▼x Congresses. |
| 700 | 1 0 | ▼a Reif, J. H. ▼q (John H.). |
소장정보
| No. | 소장처 | 청구기호 | 등록번호 | 도서상태 | 반납예정일 | 예약 | 서비스 |
|---|---|---|---|---|---|---|---|
| No. 1 | 소장처 과학도서관/보존서고1(서양서)/ | 청구기호 R 004.22 A247v | 등록번호 421048754 | 도서상태 대출불가(열람가능) | 반납예정일 | 예약 | 서비스 |
컨텐츠정보
목차
Parallel algorithms for evaluating sequences of set-manipulation operations.- Fast parallel and sequential algorithms for edge-coloring planar graphs.- Optimal parallel algorithms on planar graphs.- Efficient parallel triconnectivity in logarithmic time.- Subtree isomorphism is in random NC.- All graphs have cycle separators and planar directed depth-first search is in DNC.- On some languages in NC.- O(log(n)) parallel time finite field inversion.- Deterministic parallel list ranking.- Optimal parallel algorithms for expression tree evaluation and list ranking.- Optimal parallel evaluation of tree-structured computations by raking (extended abstract).- On finding lowest common ancestors: Simplification and parallelization.- A scheduling problem arising from loop parallelization on MIMD machines.- Scheduling dags to minimize time and communication.- Computing a perfect matching in a line graph.- Separation pair detection.- Graph embeddings 1988: Recent breakthroughs, new directions.- Simulating binary trees on hypercubes.- Embedding rectangular grids into square grids.- Efficient reconfiguration of VLSI arrays.- Embedding grids into hypercubes.- Compaction on the torus.- Channel routing with short wires.- Simple three-layer channel routing algorithms.- Applying the classification theorem for finite simple groups to minimize pin count in uniform permutation architectures.- A new algorithm for wiring layouts.- Input sensitive VLSI layouts for graphs of arbitrary degree.- Fast self-reduction algorithms for combinatorial problems of VLSI design.- Regular structures and testing: RCC-adders.- Parallel simulation and test of VLSI array logic.- Universal hashing in VLSI.- Converting affine recurrence equations to quasi-uniform recurrence equations.- Better computing on the anonymous ring.- Network complexity of sorting and graph problems and simulating CRCW PRAMS by interconnection networks.- Analysis of a distributed scheduler for communication networks.- Weighted distributed match-making.- A tradeoff between information and communication in broadcast protocols.- Families of consensus algorithms.- Uniform self-stabilizing rings.- The complexity of selection resolution, conflict resolution and maximum finding on multiple access channels.- Optimal routing algorithms for mesh-connected processor arrays.- Routing and sorting on mesh-connected arrays.- Time lower bounds for parallel sorting on a mesh-connected processor array.- A correction network for N-sorters.- Cubesort: An optimal sorting algorithm for feasible parallel computers.- A 4d channel router for a two layer diagonal model.
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