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Memory architecture & parallel access

Memory architecture & parallel access

Material type
단행본
Personal Author
Gossel, Michael. Creutzburg, Reiner, 1953-. Rebel, Burghard, 1950-.
Title Statement
Memory architecture & parallel access / Michael Gossel, Burghard Rebel, Reiner Creutzburg.
Publication, Distribution, etc
Amsterdam ;   New York :   Elsevier,   1994.  
Physical Medium
246 p. : ill. ; 25 cm.
ISBN
044482104X
Bibliography, Etc. Note
Includes bibliographical references (p. 229-243) and index.
Subject Added Entry-Topical Term
Memory management (Computer science). Parallel processing (Electronic computers).
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001 000000069823
005 19980527140654.0
008 941005s1994 ne a b 001 0 engx
010 ▼a 94023507
020 ▼a 044482104X
040 ▼a DLC ▼c DLC
049 1 ▼l 121018923 ▼f 과학
050 0 0 ▼a QA76.58 ▼b .G67 1994
082 0 0 ▼a 004.5/3 ▼2 20
090 ▼a 004.53 ▼b G679m
100 1 0 ▼a Gossel, Michael.
245 1 0 ▼a Memory architecture & parallel access / ▼c Michael Gossel, Burghard Rebel, Reiner Creutzburg.
260 0 ▼a Amsterdam ; ▼a New York : ▼b Elsevier, ▼c 1994.
300 ▼a 246 p. : ▼b ill. ; ▼c 25 cm.
504 ▼a Includes bibliographical references (p. 229-243) and index.
650 0 ▼a Memory management (Computer science).
650 0 ▼a Parallel processing (Electronic computers).
700 1 0 ▼a Creutzburg, Reiner, ▼d 1953-.
700 1 0 ▼a Rebel, Burghard, ▼d 1950-.

Holdings Information

No. Location Call Number Accession No. Availability Due Date Make a Reservation Service
No. 1 Location Science & Engineering Library/Sci-Info(Stacks2)/ Call Number 004.53 G679m Accession No. 121018923 Availability Available Due Date Make a Reservation Service B M

Contents information

Table of Contents

CONTENTS
1 Introduction = 5
2 Theory of raster or array memories = 11
  2.1 Fundamental concepts and notions = 11
  2.2 Module assignment functions and conflict-free access = 23
  2.3 Address computation circuit = 55
  2.4 Permutations for different module assignment functions = 69
3 Parallel rectangle memories = 75
  3.1 Lower and upper bounds for the number of memory modules = 75
  3.2 Rectangle memories with N= 2n memory modules = 99
  3.3 Designs for computer graphics = 111
4 Parallel straight-line memories = 125
  4.1 Conflict-free access and linear module assignment functions = 126
  4.2 Functional implementation = 135
  4.3 Designs for image processing = 154
  4.4 Vector access to an interleaved memory = 163
5 Parallel memories for general data structures = 171
  5.1 Basic concepts = 172
  5.2 Classes of module assignment functions = 184
  5.3 Address computation circuit and permutation network = 193
  5.4 Conflict-free storage of trees = 198
  5.5 Mapping of trees into dyadic memories = 216
Bibliography = 229
Subject Index = 245

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